A dynamic computational resource mapping platform to improve efficiency of system utilization¶
Masatoshi Kawai (Nagoya Univ.)
Abstract¶
Recent supercomputers adopting large-scale and many-core architecture or heterogeneous configurations have become more common, and parallelizing applications efficiently is becoming increasingly difficult. Factors behind this issue are load-imbalance, file I/Os, and frequent small-message-size MPI communication. However, reducing these factors’ impact on performance is generally difficult. In our research, to solve the above problems, we have proposed a platform that optimizes the assigning of computational resources by Dynamic Core Binding (DCB) and UT-Helper. DCB bounds a different number of cores to each process for balancing loads among cores. This approach improves computational performance and reduces energy consumption at the same time. UT-Helper creates helper-threads for the surplus cores arising from the operation of DCB and makes them responsible for MPI asynchronous communication and file I/Os, thereby hiding them. A combination of DCB and UT-Helper maximizes the efficiency of the system utilization by improving parallel performance and assisting in hiding sub-processes of applications. In this presentation, focusing on the DCB part, we will discuss the effect of reducing application calculation time and power consumption.